1. Field of the Invention
The present invention is directed to a polycrystalline semiconductor thin film layer and the method of production thereof, to a semiconductor device and the method of production thereof, and to an electronic apparatus, more specifically to an effective technology suitable for application in manufacturing transistors on the surface of polycrystalline semiconductor thin film layer (thin film transistors, TFT), polycrystalline layer for producing the thin film transistors, and electronic devices such as liquid crystal display devices or information processing devices incorporating the thin film transistors.
2. Description of the Related Art Including Information Disclosed Under 37 CFR 1.97 and 37 CFR 1.98
Thin film transistors (TFT) used heretofore in the conventional image display devices and the like have been formed on a substrate material such as amorphous silicon or micro-crystalline silicon made by means of plasma CVD on an insulating substrate of glass or quartz, with the polycrystalline silicon as element material made by means of melt and recrystallization method such as excimer laser annealing.
TFT made of polycrystalline silicon as material has field effect mobility of 100 to 200 cm2/Vsec due to decreased mobility caused by the carrier scattering in the grain boundary, in comparison with the field effect mobility ideal in the single-crystalline silicon (Japanese Unexamined Patent Publication No. H9-27452). The mobility is approximately 500 cm2/Vsec in single-crystalline silicon MOS-FET (S. M. Sze, Physics of Semiconductor Devices, Second Edition, Wiley, P449).
The position and the number of crystal grains formed on the channel of a transistor is not controllable and hence the device performance is not uniform compared to the single-crystalline silicon MOS-FET (Japanese Unexamined Patent Publication No. H10-291897).
Numerous techniques have been devised and proposed for enlarging the size of grains and for controlling the position of them. These techniques include, among others, a method for solid-state crystallization of amorphous silicon using the islet-patterned nuclei formed on the insulating substrate (Japanese Unexamined Patent Publication No. H8-316485), a method for forming a deposited amorphous layer on a polycrystalline silicon and making use of polycrystalline silicon exposed on the surface as the nuclei for next solid phase crystallization (Japanese Unexamined Patent Publication No. H8-31749), a method for selectively producing amorphous layers from partially crystallized silicon thin film by using ion-implantation and making use of the residual crystallization as nuclei for recrystallization (Japanese Unexamined Patent Publication No. H10-55960), a method for accelerating the rate of crystallization by diffusion of metal elements (Japanese Unexamined Patent Publication No. H9-27452), and a method for gradually altering the irradiating energy and irradiation period of time of pulse laser annealing (Japanese Unexamined Patent Publication No. H10-97993).
The methods as cited above of crystallization are considered not to be sufficiently maturated, resulting in the maximum grain size attainable of approximately 2 microns, with insufficient positional control of crystal grains. This is far from the practical usable size of thin film transistors, approximately 8 microns, required for the large size liquid crystal display panels, and the uniformity of device performance is not well achieved.
In addition, the crystal orientation of polycrystalline thus formed is disordered, so that there arises a problem of dispersion of device performance of field effect mobility depending on the crystal orientation.
The technologies cited above have not been successful to replace therewith the thin film transistor devices of low performance using the conventional amorphous silicon.
Thus, in order to achieve an image display device of larger size with higher performance and the like, there is a need to provide a technology for growing polycrystalline silicon for the element material of thin film transistors with a crystal orientation aligned to a specific direction (grain size larger than approximately 8 microns), and for finely controlling the position of crystal grains.
Therefore the present invention has been made in view of the above circumstances and has an object to overcome the above problems and to provide, in a semiconductor device formed by a plurality of thin film transistors on a polycrystalline layer, a manufacturing technology of the semiconductor device allowing the dispersion of characteristics such as field effect mobility of each of the thin film transistors and the like to be minimized.
Another object of the present invention is to provide a method for forming thin film transistors in a single crystal grain region by enlarging the size of crystal grains served for polycrystalline layer.
Still another object of the present invention is to provide a method for aligning the crystal orientation of crystal grains served for the polycrystalline layer.
Yet another object of the present invention is to provide a method for identifying the position of crystal grains served for a polycrystalline layer at higher precision.
Still another object of the present invention is to provide a polycrystalline layer of larger crystal grains in which the crystal orientation of crystal grains may be aligned and the position of crystal grains is identified at higher precision and transistors may be formed within a single crystal grain region, and a method for producing thereof.
Additional objects and advantages of the invention will be according to part in the description which follows and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
In brief, the overview of the principal of the present invention disclosed in this application may be as follows:
(1) An electronic apparatus comprising,
An insulating substrate (such as a glass substrate) and polycrystalline layer (polycrystalline silicon thin film) of n layers (where nxe2x89xa72), sequentially laminated on the insulating substrate with crystal grains (silicon crystal grains) sparse on the surface of thin film, the number of the crystal grains at each of the layers in a given planar area being reduced from lower to upper layer. In other words the size of the crystal grains is enlarging from lower to upper layer, the interval of crystal grains also is enlarging from lower to upper layer. On the surface area of each of the polycrystalline layers from first to (nxe2x88x921)th layer, projections each formed by a single crystal may be formed at a given interval, the crystal having a tip in a specific crystal orientation, the crystal grain served for the nth polycrystalline layer being a single crystal formed on the projections of the (nxe2x88x921)th polycrystalline layer next thereto, and respective of projections of each layer is positioned beneath the projection of the (nxe2x88x921)th polycrystalline layer. The interval of the projections is enlarging from lower to upper layer. The interval of the projections becomes twice for each lamination. The thickness of the polycrystalline layer is twice of the thickness of the lower next layer to the polycrystalline layer.
A polycrystalline layer as have been described above may be produced by (a) forming on an insulating substrate (glass substrate) an amorphous layer (amorphous silicon layer) to crystallize so as to sparse crystal grains (silicon crystal grains) on the film layer surface to provide a polycrystalline layer (polycrystalline silicon layer); (b) anisotropically etching up to a predetermined depth the polycrystalline layer so as to obtain a specific crystal orientation and to selectively maintain the area of given interval; (c) anisotropically etching the entire surface of the polycrystalline layer to form projections made of solely the specific crystal orientation at the area of given interval; (d) forming an amorphous layer on the polycrystalline layer to crystallize to form larger crystal grains using the projections as nuclei; (e) repeating the step (b) through (d) by (nxe2x88x921) times, such that for each of the process step part of projections is superposed just above some of the projections made in the preceding iteration, the interval between projections becomes larger than the preceding process, and the thickness of the amorphous semiconductor thin film is formed thicker than the preceding process iteration to provide a polycrystalline layer of n layers to form crystal grains served for the surface area of the nth layer. The interval between the projections and the thickness of the polycrystalline layer are formed so as to be twice for each layer.
(2) In the configuration (1) described above, the tips of the projections may be formed from a single crystal of Si1-xGex (0 less than xc3x97xe2x89xa61) or silicide (silicide including at least one element selected from a group consisted of Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Rt, Sc, Ti, V, Cr, Mn, Cu, Zn, Au, Ag).
The polycrystalline layer as have been described above may be produced in accordance with the following method:
In the method of producing of the means (1) the tips of the projections may be formed from a single crystal of Si1-xGex (0 less than xc3x97xe2x89xa61) or silicide (silicide including at least one element selected from a group consisted of Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Rt, Sc, Ti, V, Cr, Mn, Cu, Zn, Au, Ag)then the amorphous semiconductor thin film is formed.
(3) In the configuration (1) described above, the tips of the projections may be covered by a crystal film, other parts with exception of the tips of the projections may be covered by a film that will not become the nucleus of crystal.
The polycrystalline layer as have been described above may be produced in accordance with the method below.
In the method of production of the means (1), the amorphous semiconductor thin film may be formed after all surface with exception of the tips of the projections have been covered by a film that will not become the nucleus of crystals.
(4) A semiconductor device having a plurality of transistors on a polycrystalline layer, the polycrystalline layer being the polycrystalline layer according to any one of the means (1) to (3), and each of the transistors being formed respectively in a single crystal grain area.
In the method of producing such a semiconductor device, any one of polycrystalline layer according to the means (1) to (3) is used for producing each device in a crystal grain served therefor in the surface of nth layer.
(5) An electronic apparatus incorporating a semiconductor device having a plurality of transistors formed on a polycrystalline layer, the semiconductor device being of the semiconductor device in accordance with the means (4). For example the electronic apparatus may be a liquid crystal display device, the semiconductor device may comprises transistors driving pixels of the liquid crystal display panel and transistors constituting the peripheral driver circuit, and may be mounted behind the liquid crystal display panel of the liquid crystal display device.
(6) An electronic apparatus incorporating a semiconductor device according to the means (4), for example the electronic apparatus may be an information processing device, and transistors in the semiconductor device constitutes the central processing unit, cache circuit, memory circuit, peripheral circuit, I/O circuit, bus circuit and the like.
In accordance with the means (1),
(a) When forming polycrystalline silicon thin film of each layer, crystal grains are grown on the projections that the crystal orientation provided in the lower layer is aligned, so that the crystal grains of which the crystal orientation is aligned will be formed.
(b) The interval between projections in each layer becomes twice larger in the next layer, as well as the thickness of amorphous layer for forming polycrystalline silicon thin film is formed twice thicker than the lower next layer, so that the size of crystal grains becomes larger in the next layer, therefore the size of crystal grains served for the surface of the nth polycrystalline layer may be for example about 8 microns, the size that a thin film transistor may be formed within a single crystal grain area.
(c) The crystal grains served for the nth layer are formed around the projections of lower layer, which projections are formed at the crystal grain formed on the projections of further lower layer, and so on until first layer. In addition, since the projections are formed by using conventional photolithographic and etching technologies, the positional precision of the projections may be enough accurate. In other words the projections at each layer may be identified by the photolithographic and etching technologies, and the position of crystal grains served may be selected from among any projections formed on the first layer, and the crystal grains will be formed on the projections of the (nxe2x88x921)th layer superposed on thus selected projections so that the crystal grains to be served for may be formed at the position identified at higher precision. Thus by forming transistors in the area of crystal grains to be served, the position of transistors may be formed at higher precision.
In accordance with the means (2), in addition to the effect caused by the means (1), when manufacturing a semiconductor device, if the tip of the projections at each layer are formed by a single crystal of Si1-xGex (0 less than xc3x97xe2x89xa61) or silicide (silicide including at least one element selected from a group consisted of Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Rt, Sc, Ti, V, Cr, Mn, Cu, Zn, Au, Ag) larger crystal grains may be grown with crystal orientation aligned on the projections.
In accordance with the means (3), in addition to the effect caused by the means (1), when manufacturing a semiconductor device, the tip of the projections at each layer is made of crystal film having a specific crystal orientation, and other part with exception of the tip of the projections is covered by a thin film that will not become the nucleus of crystal, so that on the projections larger crystal grains may be grown with crystal orientation aligned.
In accordance with the means (4),
(a) When forming polycrystalline silicon thin film of each layer, a crystal grain is grown on a projection of lower layer with the crystal orientation aligned, crystal grains with crystal orientation aligned will be formed and the interval between projections at each layer becomes twice larger than the lower next layer, as well as the thickness of amorphous silicon thin film for forming polycrystalline silicon thin film is formed twice thicker than the lower next layer, so that the size of crystal grains becomes larger in the next layer, therefore the size of crystal grains served for the surface of the nth polycrystalline layer will be for example about 8 microns, the size that a thin film transistor may be formed within a single crystal grain area. As a result each thin film transistor is formed within one single crystal area, without crossing over the interface of grains, allowing the dispersion of characteristics of transistors to be minimized.
(b) Each of thin film transistors is formed respectively within a crystal grain area, which is made of a single crystal, so that the field effect mobility thereof will be as faster as approximately 500 cm2/Vsec as similar to a single crystal silicon MOS-FET.
(c) In each layer every projections may be identified by using photolithographic and etching technologies, the position of the crystal grains to be served for will be selected from within the projections formed on the first layer, and will also be formed on the projections at (nxe2x88x921)th layer superposed on thus selected projections, the thin film transistors may be formed with the position thereof being identified at higher precision.
In accordance with the means (5),
(a) An electronic apparatus incorporating a plurality of thin film transistors formed on a glass substrate is characterized in that each thin film transistor may run faster and in a manner more homogeneous, allowing an electronic apparatus having better performance and thinner size to be yielded.
(b) When transistors and peripheral driver circuit for driving pixels of the liquid crystal display panel in a liquid crystal display device is constructed by using thin film transistors formed on a glass substrate, since the thin film transistors runs faster and more homogeneous, the operating frequency of pixels in the liquid crystal display panel may be equalized, resulting in a finer display.
(c) Since the position of crystal grains served for forming thin film transistors may be identified at higher precision, the position of thin film transistors may be registered with pixels in the liquid crystal display panel, allowing to facilitate assembly.
In accordance with the means (6), since the thin film transistors formed on a glass substrate constitute the central processing circuit, cache circuit, memory circuit, peripheral driver circuit, I/O circuit, bus circuit and the like, thinner and high performance information processing device may be provided.